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features ? contactless read/write data transmission ? sensor input r s > 100k (typical) => data stream inverted ? radio frequency f rf from 100khz to 150khz ? e5550 binary compatible or ata5570c extended mode ? small size, configurable for iso/iec 11784/785 compatibility ? 7 x 32-bit eeprom data memory including 32-bit password ? separate 64-bit memory for traceability data ? 32-bit configuration register in eeprom to setup ? data rate ? rf/2 to rf/128, binary selectable or ? fixed atmel e5550 data rates ? modulation/coding ? fsk, psk, manchester, bi-phase, nrz ? other options ? password mode ? maximum block feature ? answer-on-request (aor) mode ? inverse data output ? direct access mode ? sequence terminator(s) ? write protection (through lock-bit per block) ? fast write method (5kbps versus 2kbps) ? otp functionality ? por delay up to 67ms 1. description the atmel ? ata5570c is a contactless r/w id entification ic (idic ? ) for applications in the 125khz frequency range. a single coil, connected to the chip, serves as the ic?s power supply and bi-directional communi cation interface. the antenna and chip together form a transponder or tag. the on-chip 330-bit eeprom (10 blocks, 33 bits each) can be read and written block-wise from a reader. block 0 is reserved for setting the operation modes of the ata5570c tag. block 7 may contain a password to prevent unauthorized writing. data is transmitted from the idic using load modulation. this is achieved by damping the rf field with a resistive load between the two terminals coil1 and coil2. the ic receives and decodes 100% amplitude-m odulated (ook) pulse-interval-encoded bit streams from the base station or reader. multifunctional 330-bit read/write rf sensor identification ic atmel ata5570c 9191b?rfid?05/11
2 9191b?rfid?05/11 atmel ata5570c 2. system block diagram figure 2-1. rfid system using atmel ? ata5570c tag 3. ata5570c ? building blocks figure 3-1. block diagram 3.1 analog front end (afe) the afe includes all circuits which are directly connected to the coil. it generates the ic?s power supply and handles the bi-directional data communication with the reader. it consists of the following blocks: ? rectifier to generate a dc supply voltage from the ac coil voltage ? clock extractor ? switchable load between coil1 and coil2 for data transmission from tag to the reader ? field gap detector for data transmission from the base station to the tag ? esd protection circuitry b as e s t a tion d a t a power tr a n s ponder re a der or b as e s t a tion atmel ata5570c controller coil interf a ce memory coil1 coil2 modulator analog front end por input register write decoder bit-rate generator memory (264 bit eeprom) controller test logic mode register hv generator sens vss c r lr r s
3 9191b?rfid?05/11 atmel ata5570c 3.2 data-rate generator the data rate is binary programmable to operate at any data rate between rf/2 and rf/128 or equal to any of the fixed atmel ? e5550/e5551 and atmel t5554 bit rates (rf/8, rf/16, rf/32, rf/40, rf/50, rf/64, rf/100 and rf/128). 3.3 write decoder this function decodes the write gaps and verifies the validity of the data stream according to the atmel e555x write method (pulse interval encoding). 3.4 hv generator this on-chip charge-pump circuit generates the high voltage required for programming of the eeprom. 3.5 dc supply power is externally supplied to the idic via the two coil connections. the ic rectifies and reg- ulates this rf source and uses it to generate its supply voltage. 3.6 power-on reset (por) this circuit delays the idic functionality until an accept able voltage threshold has been reached. 3.7 clock extraction the clock extraction circuit uses the external rf signal as its internal clock source. 3.8 controller the control-logic module executes the following functions: ? load-mode register with configuration data from eeprom block 0 after power-on and also during reading ? control memory access (read, write) ? handle write data transmission and write error modes ? the first two bits of the reader-to-tag data stream are the opcode, e.g., write, direct access or reset ? in password mode, the 32 bits received after the opcode are compared with the password stored in memory block 7 3.9 mode register the mode register stores the configuration data from the eeprom block 0. it is continually refreshed at the start of every block read and (re-)loaded after any por event or reset com- mand. on delivery, the mode register is preprogrammed with the value 0014 8000h which corresponds to continuous read of block 0, manchester coded, rf/64.
4 9191b?rfid?05/11 atmel ata5570c figure 3-2. block 0 configuration mapping ? atmel ? e5550 compatibility mode 3.10 modulator the modulator consists of data encoders fo r the following basic types of modulation: aor s t- s equence terminator por delay pwd lock bit 00 00 00 0 0 11 note 1), 2) bit rate 0 1 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 0 0 1 1 1 1 0 rf/2 rf/4 rf/ 8 rfu 0 1 0 1 0 0 1 1 rf/ 8 rf/16 rf/ 3 2 rf/50 rf/12 8 rf/100 rf/64 0 0 0 0 0 0 0 direct p s k 3 p s k2 p s k1 0 1 0 1 0 1 1 0 0 0 0 0 0 rf/40 2) if m as ter key < > 6 or 9 then extended f u nction mode i s di sab led 1) if m as ter key = 6 then te s t mode write comm a nd s a re ignored locked unlocked 1 0 ma s ter key modulation data p s k block cf max 00 00 0 67 5 8 2 3 1 l 4 10 11 12 17 1 8 19 20 22 24 2 3 21 3 0 3 2 3 1 29 26 2 8 27 25 1 3 14 15 16 9 01 f s k1 a 0 1 0 01 f s k2 a 1 1 0 10 re s erved 0 0 1 1 0 bi-ph as e ('50) 0 0 0 00 m a nche s ter 0 0 1 01 f s k2 1 0 0 01 f s k1 0 0 0 table 3-1. types of atmel e5550-compatible modulation modes mode direct data output encoding fsk1a (1) fsk/8, fsk/5 ?0? = rf/8; ?1? = rf/5 fsk2a (1) fsk/8, fsk/10 ?0? = rf/8; ?1? = rf/10 fsk1 (1) fsk/5, fsk/8 ?0? = rf/5; ?1? = rf/8 fsk2 (1) fsk/10, fsk/8 ?0? = rf/10; ?1? = rf/8 psk1 (2) phase change when input changes psk2 (2) phase change on bit clock if input high psk3 (2) phase change on rising edge of input manchester ?0? = falling edge, ?1? = rising edge bi-phase ?1? creates an additional mid-bit change nrz ?1? = damping on, ?0? = damping off notes: 1. a common multiple of bit rate and fsk frequencies is recommended. 2. in psk mode the selected data rate has to be an integer mu ltiple of the psk sub-carrier frequency.
5 9191b?rfid?05/11 atmel ata5570c 3.11 sensor input modulated output data stream depends on the state of the sensor input. the data stream is inverted when external resistance, connected between sensor input and vss, is more than r s >100k (typical). otherwise, the output data stream is not inverted (?normal?). 3.12 memory the memory is a 330-bit eeprom, which is arran ged in 10 blocks of 33 bits each. all 33 bits of a block, including the lock bit, are programmed simultaneously. block 0 of page 0 contains the mode/configuration data, which is not transmitted during regu- lar-read operations. block 7 of page 0 may be used as a write-protection password. bit 0 of every block is the lock bit for that bloc k. once locked, the block (including the lock bit itself) is not re-programmable through the rf field. blocks 1 and 2 of page 1 contai n traceability data and are transmitted with the modulation parameters defined in the configuration register after the opcode ?11? is issued by the reader ( figure 4-6 on page 11 ). these traceability data blocks are programmed and locked by atmel. figure 3-3. memory map l l l l l l l l block 7 block 6 block 5 block 4 block 3 block 2 block 1 block 0 user data or password 32 bits user data user data user data user data user data user data configuration data 132 0 not transmitted block 2 block 1 traceability data traceability data 1 1 page 1 page 0
6 9191b?rfid?05/11 atmel ata5570c 3.13 traceability data structure/unique id blocks 1 and 2 of page 1 contain the trace ability data and are pr ogrammed and locked by atmel during production testing (1) . the most significant byte of block 1 is fixed to e0h, the allo- cation class (acl) as defined in iso/iec 15963- 1. the second byte is therefore defined in iso/iec 7816-6 as atmel?s manufacturer id (15h). the following 5 bits indicate chip id (cid, ?00011b? for atmel ? ata5570c) the next bits (ic revision, icr) are used by atmel for the ic and/or foundry version of the atmel ata5570c. the lower 40 bits of the data encode atmel?s traceability inform ation and confor m to a unique numbering system (unique id). these 40 data bi ts contain lotid (year, quarter, number), wafernumber (wafer#) and die number on wafer (dw). note: 1. this is only valid for sawn wafer on foil delivery. figure 3-4. atmel ata5570c traceab ility data structure acl allocation class as defined in iso/iec 15963-1 = e0h mfc atmel corporation?s manufacturer code as defined in iso/iec 7816-6 = 15h cid 5bit chip id for identification of the different products ?00011b? for atmel ata5570c icr 3 bit ic revision to identify foundry and/or revision of ic year 1 digit bcd encoded year of manufacturing quarter 2bits for quarter of manufacturing number 14bits of consecutive number wafer# 5bits for wafer number dw 15bits designating sequential die number on wafer example: ?e0h? ?15h? ?00011b? ?010b? ?9h? ?00b? ?00b? 8 bit 8 bit 5 bit 3 bit 4 bit 2 bit 2 bit bit no. 1 ? 8 9 ? 16 17 ? 21 22 ? 24 25 ? 28 29 30 31 32 block 1 acl mfc cid icr ye a r quarter number bit value 63 msb 32 bit value 31 lsb 0 block 2 number wafer# dw bit no. 1 ? 12 13 ? 17 18 ? 31 32 12 bit 5 bit 15 bit example: ?0000 1010 0100b? ?0110 0b? ?000 0100 1101 0010b? (example is for atmel ata5570c, year: 2009, quarter: 1st, number: 0164, wafer#: 12, dw: 1234)
7 9191b?rfid?05/11 atmel ata5570c 4. operating the atmel ata5570c 4.1 initialization and por delay the power-on-reset (por) circuit remains active until an adequate voltage threshold has been reached. this in turn triggers the default start-up delay sequence. during this configura- tion period of about 192 field clocks, the atmel ? ata5570c is initialized with the configuration data stored in eeprom block 0. if the por delay bit is reset, no additional delay is observed after the configur ation period. tag modu lation in regul ar-read mode will be observed about 3ms after entering the rf field. if the por delay bit is set, the ata5570c remains in a perma- nent damping state until 8190 internal field clocks have elapsed. t init = (192 + 8190 por delay) t c 67ms; t c = 8 s at 125khz any field gap occurring during th is initialization phase will restart the complete sequence. after this initialization time the atmel ata5570c enters regular-read mode and modulation starts automatically, using the parameters defined in the configuration register. 4.2 tag-to-reader communication during normal operation, the data stored within the eeprom is cycled and the coil1 and coil2 terminals are load modulated. this resistive load modulation can be detected at the reader module. 4.3 regular-read mode in regular-read mode, data from the memory is transmitted serially, starting with block 1, bit 1, up to the last block (e.g., 7) , bit 32. the last block which will be read is defined by the mode parameter field maxblk in eeprom block 0. when the data block addressed by maxblk has been read, data transmission restarts with block 1, bit 1. the user may limit the cyclic datastream in regular-read mode by setting the maxblk between 0 and 7 (representing each of the 8 data blocks). if set to 7, blocks 1 through 7 can be read. if set to 1, only block 1 is transmitted continuously. if set to 0, the contents of the config- uration block (normally not transmitted) can be read. in the case of maxblk = 0 or 1, regular-read mode can not be distinguished from block-read mode. figure 4-1. examples of different maxblk settings every time the atmel ? ata5570c enters regular- or block- read mode, the first bit transmitted is a logical ?0?. the data stream starts with block 1, bit 1, contin ues through maxblk, bit 32, and cycles continuously if in regular-read mode. this behavior is different from the original atmel e555x and helps to decode psk-modulated data. block 1 block 4 block 5 block 1 block 2 maxblk = 5 maxblk = 2 maxblk = 0 block 1 block 2 block 1 block 2 block 1 block 0 block 0 block 0 block 0 block 0 0 0 0 loading block 0 loading block 0 loadin g block 0
8 9191b?rfid?05/11 atmel ata5570c 4.4 block-read mode with the direct access command, the addressed block is repetitively read only. this mode is called block-read mode. direct access is ent ered by transmitting the page access opcode (?10? or ?11?), a single ?0? bit, and the requested 3-bit block address, when the tag is in normal mode. in password mode (pwd bit set), the direct access to a single block needs the valid 32-bit password to be transmitted after the page access opcode, whereas a ?0? bit and the 3-bit block address follow afterwards. in case the transmitted password does not match with the contents of block 7, the ata5570c tag returns to the regular-read mode. note: a direct access to block 0 of page 1 will r ead the configuration data of block 0, page 0. a direct access to block 3 to 7 of page 1 reads all data bits as zero. 4.5 atmel e5550 sequence terminator the sequence terminator (st) is a special dampi ng pattern which is inserted before the first block and may be used to synchronize the reader. this atmel ? e5550-compatible sequence terminator consists of four bit periods with underlaying data values of ?1?. during the second and the fourth bit period, modulation is switched off (if manchester coding is activated, then modulation is switched on). bi-phase modulated data blocks need fixed leading and trailing bits in combination with the sequence terminator to be reliably identified. the sequence terminator may be individually enabled by setting mode bit 29 (st = ?1?) in the atmel e5550-compat ibility mode (x-mode = ?0?). in the regular-read mode, the sequence terminator is inserted at the start of each max- blk-limited read data stream. in block-read mo de, after any block-write or direct access command, or if maxblk was set to ?0? or ?1?, the sequence terminator is inserted before the transmission of the selected block. this behavior is different from former atmel e5550-compatible ics (atmel t5551, atmel t5554). figure 4-2. read data stream with sequence terminator block 1 block 2 maxblk block 1 block 2 block 1 block 2 maxblk block 1 block 2 no terminator st = on sequence terminator sequence terminator regular read mode
9 9191b?rfid?05/11 atmel ata5570c figure 4-3. atmel ? e5550-compatible sequence terminator waveforms 4.6 reader-to-tag communication data is written to the tag by interrupting the rf field with short field gaps (on-off keying) in accordance with the atmel e5550 write method. the time between two gaps encodes the ?0? or ?1? information to be transmitted (pulse interval encoding). the duration of the gaps is usu- ally 50s to 150s. the time between two gaps is nominally 24 field clocks for a ?0? and 54 field clocks for a ?1?. when there is no gap for more than 64 field clocks after a previous gap, the atmel ata5570c exits the write mode. the tag starts with the command execution if the correct number of bits were received. if there is a failure detected the atmel ata5570c does not continue and will en ter regular-read mode. 4.7 start gap the initial gap is referred to as the start gap. this triggers the reader-to-tag communication. during this mode of operation, the receive damping is permanently enabled to ease gap detection. the start gap may need to be longer than subsequent gaps in order to be detected reliably. a start gap will be accepted at any time after the m ode register has been loaded ( 3ms). a single gap will not change the pr eviously selected page (by fo rmer opcode ? 10? or ?11?). figure 4-4. start of reader-to-tag communication last bit first bit manchester bit period modulation off (on) data "1" data "1" modulation off (on) bit "1" or "0" fsk sequence waveforms per different modulation types v coil pp data "1" data "1" sequence terminator not suitable for biphase or psk modulation write mode read mode d 0 d 1 w gap s gap
10 9191b?rfid?05/11 atmel ata5570c 4.8 write-data protocol the atmel ? ata5570c expects to receive a dual-bit opcode as the first two bits of a reader command sequence. there are three valid opcodes: ? the opcodes ?10? and ?11? precede all block-write and direct-access operations for page 0 and page 1 ? the reset opcode ?00? initiates a por cycle ? the opcode ?01? precedes all test-mode write operations. any test-mode access is ignored after the master key (bits 1 to 4) in block 0 has been set to ?6?. any further modifications of the master key are prohibited by setting the lock bit of block 0 or the otp bit. writing has to fo llow these rules: ? standard write needs the opcode, the lock bit, 32 data bits and the 3-bit address (38bits total) ? protected write (pwd bit set) requires a valid 32-bit password after opcode and before data and address bits ? for the aor wake-up command an opcode and a valid password are necessary to select and activate a specific tag note: the data bits are read in the same order as written. if the transmitted command sequence is invalid, the atmel ata5570c enters regular-read mode with the previously selected page (by former opcode ?10? or ?11?). figure 4-5. complete writing sequence table 4-1. write-data decoding scheme parameters remark symbol min max unit start gap ? sgap 10 50 fc write gap normal write mode wgap 8 30 fc write data in normal mode ?0? data d0 16 31 fc ?1? data d1 48 63 fc por block 0 loading read mode block address programming block data lock bit op-code read mode start gap write mode
11 9191b?rfid?05/11 atmel ata5570c figure 4-6. atmel ? ata5570 command formats 4.9 password when password mode is active (pwd = 1), th e first 32bits after the opcode are regarded as the password. they are compared bit-by-bit with the contents of block 7, starting at bit 1. if the comparison fails, the atmel ata5570c will not program the memory, in stead it will restart in regular-read mode once the command transmission is finished. note: in password mode, maxblk should be set to a value below 7 to prevent the password from being transmitted by the atmel ata5570c. each transmission of the direct access command (two opcode bits, 32bits password, ?0? bit plus 3 address bits = 38bits) needs about 18ms. testing all possible combinations (about 4.3billion) would take about two years. 4.10 answer-on-request (aor) mode when the aor bit is set, the atmel ata5570c does not start modulation in the regular-read mode after loading configuration block 0. the tag waits for a valid aor data stream (?wake-up command?) from the reader before modulation is enabled. the wake-up command consists of the opcode (?10?) followed by a valid password. the selected tag will remain active until the rf field is turned off or a new command with a different password is transmitted which may address another tag in the rf field. aor (wake-up command) protected write standard write direct access (pwd = 1) reset command op 1p * l 1 data 32 2 addr 0 1 password 32 l 1 data 32 2 addr 0 10 1 password 32 1 password 32 2 addr 0 direct access (pwd = 0) 2 addr 0 00 page 0/1 regular read 0 0 * p = page selector 1p * 1p * 1p * 1p *
12 9191b?rfid?05/11 atmel ata5570c figure 4-7. answer-on-request (aor) mode figure 4-8. coil voltage after programming of a memory block table 4-2. atmel ? ata5570c ? modes of operation pwd aor behavior of tag after reset command or por de-activate function 11 answer-on-request (aor) mode: - modulation starts after wake-up with a matching password - programming needs valid password command with non-matching password deactivates the selected tag 10 password mode: - modulation in regular-read mode starts after reset - programming and direct access needs valid password 0-- normal mode: - modulation in regular-read mode starts after reset - programming and direct access without password por loading block 0 no modulation because aor = 1 modulation aor wake-up command (with valid pwd) v coil 1 - coil 2 v coil 1- coil 2 write data to tag programming and data verification read programmed memory block read block 1..maxblk 5.6 ms (block-read mode) (regular-read mode) por/ g a p or single
13 9191b?rfid?05/11 atmel ata5570c figure 4-9. anticollision procedure using aor mode init tags with aor = "1" , pwd = "1" wait for t w > 2.5 ms "select a single tag" send opcode + pwd => "wake up command" power on reset read configuration receive damping on reader tag password correct ? send block 1...maxblk decode data all tags read ? exit field off => on no yes no yes enter aor mode wait for opcode + pwd => "wake up command" field on => off
14 9191b?rfid?05/11 atmel ata5570c 4.11 programming when all necessary information has been received by the atmel ? ata5570c, programming may proceed. there is a clock delay between the end of the writing sequence and the start of programming. typical programming time is 5.6ms. this cycle in cludes a data verification read to grant secure and correct programming. after programming is successfully executed, the atmel ata5570c enters block-read mode transmitting the block just programmed ( figure 4-8 on page 12 ). note: this timing and behavior is different from the e555x-family predecessors. 5. error handling several error conditions can be detected to ensure that only valid bits are programmed into the eeprom. there are two error types, which lead to two different actions. 5.1 errors during writing the following detectable errors could occur during writing data to the atmel ata5570c: ? wrong number of field clocks between two gaps (i.e., not a valid ?1? or ?0? pulse stream) ? password mode is activated and the password does not match the contents of block 7 ? the number of bits received in the command sequence is incorrect valid bit counts accepted by the atmel ata5570c are: password write 70 bits (pwd = 1) standard write 38 bits (pwd = 0) aor wake up 34 bits (pwd = 1) direct access with pwd 38 bits (pwd = 1) direct access 6 bits (pwd = 0) reset command 2 bits page 0/1 regular-read 2 bits if any of these erroneous conditions are det ected, the atmel ata5570c enters regular-read mode, starting with block 1 of the page defined in the command sequence. 5.2 errors before/during programming if the command sequence was received successful ly, the following error could still prevent programming: ? the lock bit of the addressed block is already set in case of a locked block, programming mode will not be entered. the atmel ata5570c reverts to block-read mode, continuously transmitting the currently addressed block.
15 9191b?rfid?05/11 atmel ata5570c if the command sequence is validated and the addressed block is not write-protected, the new data will be programmed into the eeprom memory. the new st ate of the blo ck-write protec- tion bit (lock bit) will be programme d at the same time accordingly. each programming cycle consis ts of 4 consecutive steps. 1. erase block 2. erase verification (data = ?0?) 3. programming 4. write verification (corresponding data bits = ?1?) ? if a data verification error is detected after an executed data block programming, the tag will stop modulation (modulation defeat) until a new command is transmitted. figure 5-1. ata5570c functional diagram setup modes command decode write number of bits password check lock bit check program and verify modulation defeat fail data = old ok data = new data verification failed fail data = old gap command mode fail data = old power-on reset op(00) write op(1p)* op(01) start gap regular-read mode addr = 1 to maxblk block-read mode addr = current gap single gap aor mode aor = 1 aor = 0 page 0 or 1 * p = page selector direct access op (1p)* page 0 op (1p)* op(10..) op(11..) page 1 page 0 test-mode if master key <> 6 reset to page 0
16 9191b?rfid?05/11 atmel ata5570c 6. atmel ata5570c in ex tended mode (x-mode) in general, the block 0 setting of the master key (bits 1 to 4) to the value ?6? or ?9? together with the x-mode bit will enable th e extended mode functions. ? master key = ?9?: test mode access and extended mode are both enabled. ? master key = ?6?: any test mode access w ill be denied but the ex tended mode is still enabled. any other master key setting will prevent the activation of the atmel ata5570c extended mode options, even when the x-mode bit is set. 6.1 binary bit-rate generator in extended mode the data rate is binary programmable to operate at any data rate between rf/2 and rf/128 as given in the formula below. data rate = rf/(2n + 2) 6.2 otp functionality if the otp bit is set to ?1?, all memory blocks are write protected and behave as if all lock bits are set to ?1?. if, additionally, the master key is set to ?6?, the atmel ? ata5570c mode of oper- ation is locked forever (= otp functionality). if the master key is set to ?9?, the test-mode access allows the re-configuration of the tag. figure 6-1. block 0 ? configuration map in extended mode (x-mode) aor s t- s equence terminator por delay pwd lock bit 00 00 00 0 0 11 note 1), 2) bit rate 0 1 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 0 0 1 1 1 1 0 rf/2 rf/4 rf/ 8 rfu 0 1 0 1 0 0 1 1 rf/ 8 rf/16 rf/ 3 2 rf/50 rf/12 8 rf/100 rf/64 0 0 0 0 0 0 0 direct p s k 3 p s k2 p s k1 0 1 0 1 0 1 1 0 0 0 0 0 0 rf/40 2) if m as ter key < > 6 or 9 then extended f u nction mode i s di sab led 1) if m as ter key = 6 then te s t mode write comm a nd s a re ignored locked unlocked 1 0 ma s ter key modulation data p s k block cf max 00 00 0 01 f s k1 a 0 1 0 01 f s k2 a 1 1 0 10 re s erved 0 0 1 1 0 bi-ph as e ('50) 0 0 0 00 m a nche s ter 0 0 1 01 f s k2 1 0 0 01 f s k1 0 0 0
17 9191b?rfid?05/11 atmel ata5570c 6.3 sequence start marker figure 6-2. atmel ata5570c sequence start marker in extended mode the atmel ? ata5570c sequence-start marker is a special damping pattern which may be used to synchronize the reader. the sequence start marker consists of two bits (?01? or ?10?) which are inserted as header before the first block to be transmitted if the bit 29 in extended mode is set. at the start of a new block sequence, the value of the two bits is inverted. table 6-1. atmel ? ata5570c types of modulation in extended mode and sensor input r s <100k typical mode direct data output encodi ng inverse data output encoding fsk1 (1) fsk/5, fsk/8; ?0? = rf/5; ?1? = rf/8 fsk/8, fsk/5; ?0? = rf/8; ?1? = rf/5 (= fsk1a) fsk2 (1) fsk/10, fsk/8; ?0? = rf/10; ?1? = rf/8 fsk/8, fsk/10; ?0? = rf/8; ?1? = rf/10 (= fsk2a) psk1 (2) phase change when input changes phase change when input changes psk2 (2) phase change on bit clock if input high phase change on bit clock if input low psk3 (2) phase change on rising edge of input phase change on falling edge of input manchester ?0? = falling edge ?1? = rising edge on mid-bit ?1? = falling edge ?0? = rising edge on mid-bit bi-phase 1 (?50) ?1? creates an additional mid-bit change ?0? creates an additional mid-bit change bi-phase 2 (?57) ?0? creates an additional mid-bit change ?1? creates an additional mid-bit change nrz ?1? = damping on, ?0? = damping off ?0? = damping on, ?1? = damping off notes: 1. a common multiple of bit rate and fsk frequencies is recommended. 2. in psk mode the selected data rate has to be an integer multiple of the psk sub-carrier frequency. block 1 block 2 maxblk block 1 10 10 01 block-read mode regular-read mode sequence start marker block 2 maxblk 10 block n 01 block n 10 block n 01 block n 10 block n 01
18 9191b?rfid?05/11 atmel ata5570c 6.4 inverse data output the atmel ata5570c supports in its extended mode (x-mode) an inverse data output option. if inverse data is enabled, the modulator as shown in figure 6-3 works on inverted data (see table 6-1 ). this function is supported for all basic types of encoding. table 6-1 shows the modulation, when r s < 100k typical. figure 6-3. data encoder for inverse data output 6.5 fast write in the optional fast-write mode the time between two gaps is nominally 12 field clocks for a ?0? and 27 field clocks for a ?1?. when there is no gap for more than 32 field clocks after a previ- ous gap, the ata5570c will exit the write mode. please refer to table 6-2 and figure 4-6 on page 11 . modulator xor inverse data output d sync clk r intern out data data output data clock psk1 psk2 psk3 direct/nrz fsk1 fsk2 manchester bi-phase mux xor sensor in table 6-2. fast write decoding schemes parameters remark symbol min max unit start gap ? sgap 10 50 fc write gap normal write mode wngap 8 30 fc fast write mode wfgap 8 20 fc write data in normal mode ?0? data d0 16 31 fc ?1? data d1 48 63 fc write data in fast mode ?0? data d0 8 15 fc ?1? data d1 24 31 fc
19 9191b?rfid?05/11 atmel ata5570c figure 6-4. example of manchester coding with data rate rf/16 rf field 9 2 1 16 8 18 18 9 16 16 1 8 916 9 2 1 16 8 18 916 inverted modulator data stream 1 001 8 fc 8 fc data rate = 10 manchester coded 16 field clocks (fc) signal
20 9191b?rfid?05/11 atmel ata5570c figure 6-5. example of bi-phase coding with data rate rf/16 rf field 9 2 1 16 818 18 9 16 16 1 8 916 9 2 1 16 8 18916 inverted modulator signal bi-phase coded data stream 1 001 8 fc 8 fc data rate = 10 16 field clocks (fc)
21 9191b?rfid?05/11 atmel ata5570c figure 6-6. example: fsk1a coding with data rate rf/40, subcarrier f 0 = rf/8, f 1 = rf/5 data stream 1 001 data rate = 10 rf field 1 5 18 18 18 515 inverted modulator signal 40 field clocks (fc) f 0 = rf/8, f 1 = rf/5 1
22 9191b?rfid?05/11 atmel ata5570c figure 6-7. example of psk1 coding with data rate rf/16 data stream 001 10 rf field 2 189161 8 16 1 8 16 1 8 16 1 8 16 1 8 inverted modulator signal subcarrier rf/2 1 8 fc 8 fc data rate = 16 field clocks (fc)
23 9191b?rfid?05/11 atmel ata5570c figure 6-8. example of psk2 coding with data rate rf/16 data stream 001 10 rf field 2 189161816181618 16 1 8 16 1 8 inverted modulator signal subcarrier rf/2 1 8 fc 8 fc data rate = 16 field clocks (fc)
24 9191b?rfid?05/11 atmel ata5570c figure 6-9. example of psk3 coding with data rate rf/16 data stream 1 001 8 fc 8 fc data rate = 10 rf field 2 1891618 1618 1618 16 1 8 16 1 8 inverted modulator signal sub-carrier rf/2 16 field clocks (fc)
25 9191b?rfid?05/11 atmel ata5570c 7. absolute maximum ratings stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond t hose indicated in the operational sections of this specification is not implied. exposure to absolute maximum rati ng conditions for extended periods may affect device reliability . parameters pin symbol value unit maximum dc current into coil1/coil2 (t = 1ms) 2, 7 i coil 20 ma maximum ac current into c oil1/coil2 (f = 125khz) 2, 7 i coil p 20 ma power dissipation (dice) (1) 2, 7 p tot 100 mw operating ambient temperature range t amb ?25 to +105 c storage temperature range (2) t stg ?40 to +150 c notes: 1. free-air condition, time of application: 1s 2. data retention reduced at high temperature 8. operating characteristics all parameters given are valid for t amb = +25c and f coil = 125 khz, unless otherwise specified. no. parameters test conditions pin symbol min typ max unit type* 1 rf frequency range 2, 7 f rf 100 125 150 khz 2.1 2.2 supply current (without current consumed by the external lc tank circuit and without external resistance on sensor input) t amb = 25c 2, 7 i dd 1.5 3 a t read t amb = ?25c to +85c 2, 7 i dd 24aq 3.1 coil voltage (ac supply) necessary for read (1) 2, 7 v coil pp 10 v clamp v pp q 4clamp voltage 10ma current into coil1/coil2 2, 7 v clamp 17 23 v pp t 5 startup time (2) t startup 2.5 3 ms q 6.1 6.2 data retention t op = 55c t retention 10 20 50 year q t stg = 150c t retention 96 h t (3) 7 programming cycles erase all/write all n cycle 100,000 cycles q 8 sensor input trip point resistance (modulation inverted) 4, 5 r t 50 100 200 k t 9 resonance capacitor c r (4) see figure 2-1 on page 2 c r 323 340 357 pf t 10 q-factor of coil l r q l 15 20 25 q *) type means: a = 100% tested, b = 100% correlation tested, c = characterized on samples, d = design parameter, q = guaranteed based on initial product qualification data, t = directly or in directly tested during production. notes: 1. current into coil1/coil2 has to be limited to 20ma 2. time from field on to modulation start 3. tested on wafer basis 4. only available in so8 package version
26 9191b?rfid?05/11 atmel ata5570c figure 9-1. measurement setup for i dd and v mod 9. reliability parameters symbol value unit electrostatic discharge esd s.5.1 (human body model) v max 2000 v electrostatic discharge jedec a115a (machine model) v max 200 v lifetime in so8 at t op =150c t l 1008 h coil 1 coil 2 - + v outmax r bat68 bat68 10. ordering information extended type number package drawing ata557001c-ddb 6? sawn wafer on foil with ring, thickness 150m (approx. 6mil) figure 11-2 on page 28 ATA557001C-DDT die in waffle pack, thickness 150m (approx. 6mil) figure 11-3 on page 29 ata557001c-taqy so8 package with additional resonance capacitor of 340pf figure 11-4 on page 30
27 9191b?rfid?05/11 atmel ata5570c 11. package information figure 11-1. pad layout dimen s ion s in m ata5570 c2 8 0 100 1020 70 10 3 0 100 100 c1 1 3 5 1 3 0 292 112.5 57 3 105.5 8 0 s en s v ss
28 9191b?rfid?05/11 atmel ata5570c figure 11-2. sawn wafer on foil with ring title drawing no. rev. packa g e drawin g contact: p a ck a gedr a wing s @ a tmel.com 9.920-6704.01-4 1 ata5570xxc-ddb dimen s ion s 10/01/10 20:1 die dimen s ion s dimen s ion s in mm s pecific a tion s a ccording to din technic a l dr a wing s orient a tion on fr a me 0.1125 0.1 (0.07) 0.0 8 1.0 3 0.995 0. 8 95 0.1055 0.0 3 5 0 0.1 (0.1) c2 c1 0.0 8 212 ? 194.5 ? 150 212 8 7.5 8 6.5 w a fer ata5570xxc-ddb 6" w a fer fr a me, pl as tic thickne ss 2.5mm adwill d176 l ab el: qty: w a fer no: lot no: prod: ata5570xxc-ddb 59.5 6 3 .6 4b b ? 227.7 a ? 3 a 0 0 0.292 0.57 3 0.05 0.1 3 0. 8 9 0.97 1.02 0.15 0.012 0.15 3 5 0.01 3 0.00 3 5 0.001 polyimide 01 option xx
29 9191b?rfid?05/11 atmel ata5570c figure 11-3. die in waffle pack title drawing no. rev. packa g e drawin g contact: p a ck a gedr a wing s @ a tmel.com 9.920-6705.02-4 tr a y: h20-050x12 m a teri a l: p s , b l a ck, cond u ctive common dimen s ion s (unit of me asu re = mm) 1 chip dimen s ion s ata5570xxc-ddt 02/2 8 /11 dimen s ion s in mm s pecific a tion s a ccording to din technic a l dr a wing s 0.1055 polyimide 0.1 3 5 0.1 1.0 3 c1 c2 20:1 5:1 chip orient a tion chip identific a tion ata5570 chip dimen s ion s ata5570xxc-ddt a0 1.27 k0 0. 3 5 b0 qty. per tr a y: 400 1.27 0.0 8 0.1125 0.57 3 0.0 8 0.292 0.1 3 1.02 (0.1) 0.1 2.04 b0 k0 2.04 a0 45.6 50. 8 01 option xx 0.15 0.012 0.15 3 5 0.01 3 0.00 3 5 0.001
30 9191b?rfid?05/11 atmel ata5570c figure 11-4. so8 package package: so 8 dimensions in mm specifications according to din technical drawings issue: 1; 15.08.06 drawing-no.: 6.541-5031.01-4 14 85 0.2 5 0.2 3.8 0.1 6 0.2 3.7 0.1 4.9 0.1 3.81 0.4 1.27 0.1 +0.15 1.4
31 9191b?rfid?05/11 atmel ata5570c 11.1 pin configuration of so8 version figure 11-5. pinning so8 12. revision history 1 2 3 4 8 7 6 5 nc coil1 nc sens nc coil2 nc vss table 11-1. pin description pin symbol function 1 nc not connected 2 coil1 antenna pin 1 3 nc not connected 4 sens sensor input 5 vss ground 6 nc not connected 7 coil2 antenna pin 2 8 nc not connected please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. revision no. history 9191b-rfid-05/11 ? figure 3-2 ?block 0 configuration mapping ? atmel ? e5550 compatibility mode? on page 4 changed
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